1. Field of the Invention
The present invention relates to a developing system and method for optimizing the energy consumption of an application program for a digital signal processor (DSP), and more particularly to a system and method which utilize a DSP simulator to simulate the total energy consumption and the amount of energy consumption of each instruction consumes and make a statistics of the times each instruction is used and make a bit-width accuracy tolerability of each instructions of the application program. Then, transmit the simulation results to a program compiling unit or a program code generating unit to correct the compiling scheme or the programming style to meet the energy consumption limitation.
2. Description of the Prior Art
Digital Signal Processor (DSP) has been widely applied in various data processing applications. The operation principle of DSP is as follows: received a digital signal which is converted from analog signal, the digital signal is composed of 0 or 1, and then the digital signal is modified, deleted or enhanced, and transfer the signal to other system chips or components, so that not only programmability is available, but also the real-time operating speed is fast. In the development history of the DSP, it can be observed that, since 1982, a DSP with 50% decrease of power consumption can be manufactured every 18 months, and its energy consumption to performance ratio can be reduced by 10 times every 5 years, so that a current DSP can real-time execute a large quantity of instruction operations at very high accuracy and processing speed, and become a core component of modern electronic products. However, with now a day ever down scaling CMOS Silicon process, the DSP 50% decrease of power consumption every 18 months is approaching its physical limitation. In other words, it is getting harder and harder to meet another 50% decrease in every 18 months with the physical scale we are having right now. As within every processor the power consumption of a processor have a lot to do with the program and application it carries. So if the programming coding style and program algorithm of the application program can match with the different DSP architectures, with both software and hardware matching together it can largely decrease the energy consumption without kept pushing the hardware manufacture process advancing And since there are so many types of DSP in the current practice, average program developer can hardly memorize and understand different architectures between every DSP.
Generally, in order to satisfy the speed requirement for an application, the operational software program of the DSP is generally designed as in algorithmically optimized for such an application. In terms of hardware, the power consumption of the DSP is mainly related to the number of transistors involve in processing the computation process, the execution voltage of the DSP, and operating clock frequency. In another aspect, the algorithmic design in software program of the DSP decides the number of transistors participating in computation, the required operating clock frequency, and operating voltage. Therefore, in addition to develop a low-power-consumption DSP software program to match the hardware architecture of a DSP, actual power consumption of the application program for a DSP can also be reduced through software design by designing an algorithm with lower power consumption on software. With the demand of applied systems, the current DSP often needs to expand into a more complicated system. However, a current system for developing the DSP only provides a platform for compiling the DSP, and does not provide an effective solution for a developer to evaluate energy consumption at system, application and algorithm levels to optimize energy consumption performance of the DSP.
In view of this, during the development of the DSP, in order for a DSP developer to predict energy consumption information of the DSP when the DSP executes a program code, to optimize energy consumption and operational capability of the DSP, the inventor develops the present invention with years of experience and continuous research, development, and improvement.